173 search results - page 10 / 35 » Low power and low voltage CMOS digital circuit techniques |
DATE
1999
IEEE
14 years 1 days ago
1999
IEEE
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
ISCAS
2002
IEEE
14 years 20 days ago
2002
IEEE
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
— Domino circuits are used to achieve higher system performance than static CMOS techniques. This work briefly surveys domino keeper designs for high fan-in domino circuits. A ne...
ISLPED
2009
ACM
14 years 2 months ago
2009
ACM
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
TheRFdesignparadigm will changesignificantly asCMOS technology scales and integration levels rise to accommodate multi-band, multi-mode transceivers and baseband processors. This...