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VLSID
2007
IEEE
130views VLSI» more  VLSID 2007»
14 years 7 months ago
Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...
Rahul Jain, Preeti Ranjan Panda
CASES
2003
ACM
14 years 18 days ago
Architectural optimizations for low-power, real-time speech recognition
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
IPPS
2006
IEEE
14 years 1 months ago
A stochastic multi-objective algorithm for the design of high performance reconfigurable architectures
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
Wing On Fung, Tughrul Arslan
ICASSP
2011
IEEE
12 years 11 months ago
A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder
In this paper, based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder wit...
Jia-Wei Liang, He-Yuan Lin, Gwo Giun Lee
CMS
2011
229views Communications» more  CMS 2011»
12 years 7 months ago
Twin Clouds: Secure Cloud Computing with Low Latency - (Full Version)
Abstract. Cloud computing promises a cost effective enabling technology to outsource storage and massively parallel computations. However, existing approaches for provably secure ...
Sven Bugiel, Stefan Nürnberger, Ahmad-Reza Sa...