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» Low power architecture of the soft-output Viterbi algorithm
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TCAD
2010
97views more  TCAD 2010»
13 years 2 months ago
Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li...
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 7 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
IPPS
2006
IEEE
14 years 1 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
CF
2006
ACM
14 years 1 months ago
Tile size selection for low-power tile-based architectures
In this paper, we investigate the power implications of tile size selection for tile-based processors. We refer to this investigation as a tile granularity study. This is accompli...
John Oliver, Ravishankar Rao, Michael Brown, Jenni...
MOBICOM
2009
ACM
14 years 1 months ago
Dynamic spectrum access in DTV whitespaces: design rules, architecture and algorithms
In November 2008, the FCC ruled that the digital TV whitespaces be used for unlicensed access. This is an exciting development because DTV whitespaces are in the low frequency ran...
Supratim Deb, Vikram Srinivasan, Ritesh Maheshwari