169 search results - page 22 / 34 » Low power architecture of the soft-output Viterbi algorithm |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
GLVLSI
2003
IEEE
14 years 18 days ago
2003
IEEE
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section ...
MSWIM
2005
ACM
14 years 26 days ago
2005
ACM
We investigate the impact of power control on latency in wireless ad-hoc networks. If transmission power is increased, interference increases, thus reducing network capacity. A no...
EMSOFT
2005
Springer
14 years 25 days ago
2005
Springer
Power leakage constitutes an increasing fraction of the total power consumption in modern semiconductor technologies. Recent research efforts have tried to integrate architecture...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...