169 search results - page 3 / 34 » Low power architecture of the soft-output Viterbi algorithm |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
VLSISP
2008
13 years 5 months ago
2008
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
ISLPED
2005
ACM
14 years 28 days ago
2005
ACM
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
ICDCSW
2003
IEEE
14 years 19 days ago
2003
IEEE
We present an integrated dual approach to reduce power consumption in infrastructure-mode 802.11 wireless LANs. A novel distributed power control algorithm adaptively adjusts the ...
DSD
2006
IEEE
14 years 1 months ago
2006
IEEE
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...