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FCCM
1998
IEEE
169views VLSI» more  FCCM 1998»
13 years 11 months ago
Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application
Abstract Image processing, specifically Automatic Target Recognition (ATR) in Synthetic Aperture Radar (SAR) imagery, is an application area that can require tremendous processing ...
Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohe...
IPPS
2006
IEEE
14 years 21 days ago
Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
Maryam Mizani, Daler N. Rakhmatov
FAST
2004
13 years 8 months ago
CAR: Clock with Adaptive Replacement
CLOCK is a classical cache replacement policy dating back to 1968 that was proposed as a low-complexity approximation to LRU. On every cache hit, the policy LRU needs to move the a...
Sorav Bansal, Dharmendra S. Modha
PPL
2008
185views more  PPL 2008»
13 years 6 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
CISS
2007
IEEE
13 years 8 months ago
Echo-Cancellation for Ultrasonic Data Transmission through a Metal Channel
– The process control industry has shown great interest in implementation of low cost, low power wireless sensor networks. Such networks are much easier to deploy and reconfigure...
Richard Primerano, Kevin Wanuga, Joseph Dorn, Mosh...