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GLVLSI
2010
IEEE
187views VLSI» more  GLVLSI 2010»
14 years 11 days ago
Write activity reduction on flash main memory via smart victim cache
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
Liang Shi, Chun Jason Xue, Jingtong Hu, Wei-Che Ts...
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
13 years 12 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
TCSV
2002
103views more  TCSV 2002»
13 years 7 months ago
A scalable and programmable architecture for 2-D DWT decoding
The compression of still images by means of the discrete wavelet transform (DWT), adopted in the JPEG-2000 and MPEG-4 standards, is becoming more and more widespread because it yie...
Massimo Ravasi, L. Tenze, Marco Mattavelli
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
14 years 1 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
AES
2005
Springer
137views Cryptology» more  AES 2005»
13 years 7 months ago
Design of a multimedia processor based on metrics computation
Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-...
Nader Ben Amor, Yannick Le Moullec, Jean-Philippe ...