1004 search results - page 32 / 201 » Low power methodology and design techniques for processor de... |
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
HPCA
2011
IEEE
13 years 6 days ago
2011
IEEE
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
HPDC
1999
IEEE
14 years 24 days ago
1999
IEEE
We present a performance-based methodology for designing a high-bandwidth radar application on commodity platforms. Unlike many real-time systems, our approach works for commodity...
EUROGP
2001
Springer
14 years 29 days ago
2001
Springer
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...
MICRO
2006
IEEE
14 years 2 months ago
2006
IEEE
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...