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» Low power techniques for Motion Estimation hardware
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DATE
2008
IEEE
123views Hardware» more  DATE 2008»
16 years 4 days ago
Test Strategies for Low Power Devices
Ultra low-power devices are being developed for embedded applications in bio-medical electronics, wireless sensor networks, environment monitoring and protection, etc. The testing...
C. P. Ravikumar, M. Hirech, X. Wen
USENIX
2003
15 years 7 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
Hai Huang, Padmanabhan Pillai, Kang G. Shin
ISLPED
1997
ACM
124views Hardware» more  ISLPED 1997»
15 years 9 months ago
Low power high level synthesis by increasing data correlation
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
Dongwan Shin, Kiyoung Choi
ISLPED
1995
ACM
122views Hardware» more  ISLPED 1995»
15 years 9 months ago
A multiple clocking scheme for low power RTL design
This paper presents an e ective multiple clocking scheme for lower power RTL circuit design. The basis is to partition a behavioral description of the circuit into m modules fed b...
Christos A. Papachristou, Mark Spining, Mehrdad No...
ASPDAC
2006
ACM
116views Hardware» more  ASPDAC 2006»
15 years 11 months ago
Abridged addressing: a low power memory addressing strategy
Abstract— The memory subsystem is known to comprise a significant fraction of the power dissipation in embedded systems. The memory addressing strategy, which determines the seq...
Preeti Ranjan Panda