552 search results - page 28 / 111 » Low power techniques for Motion Estimation hardware |
121
click to vote
ICCD
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper describes a core-customization process of a CISC processor core for a given application program. It aims at the power reduction in the CISC processor core by fully util...
160
click to vote
ISCAS
1999
IEEE
15 years 10 months ago
1999
IEEE
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
248
click to vote
ISCAS
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper proposes a shared-capacitor charge-sharing ROM (SCCS-ROM). The SCCS-ROM reduces the swing voltage using the charge-sharing technique of the charge-sharing ROM (CSROM) [...
147
click to vote
ISLPED
2005
ACM
15 years 11 months ago
2005
ACM
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
172
click to vote
VLSISP
2010
15 years 4 months ago
2010
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...