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VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 7 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
TSE
1998
130views more  TSE 1998»
13 years 7 months ago
Automatic Support for Usability Evaluation
—The main goal of this work is to propose a method to evaluate user interfaces using task models and logs generated from a user test of an application. The method can be incorpor...
Andreas Lecerof, Fabio Paternò
DAC
1994
ACM
13 years 11 months ago
Dynamic Search-Space Pruning Techniques in Path Sensitization
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
João P. Marques Silva, Karem A. Sakallah
ETS
2006
IEEE
110views Hardware» more  ETS 2006»
14 years 1 months ago
Deterministic Logic BIST for Transition Fault Testing
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
Valentin Gherman, Hans-Joachim Wunderlich, Jü...
COMPSAC
2008
IEEE
13 years 7 months ago
Superfit Combinational Elusive Bug Detection
Software that has been well tested and analyzed may fail unpredictably when a certain combination of conditions occurs. In Bounded Exhaustive Testing (BET) all combinations are te...
R. Barzin, S. Fukushima, William E. Howden, S. Sha...