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» Low-power circuits using dynamic threshold devices
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DATE
2009
IEEE
171views Hardware» more  DATE 2009»
13 years 11 months ago
Physically clustered forward body biasing for variability compensation in nanometer CMOS design
Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...
GI
2004
Springer
14 years 15 days ago
A Low-Cost Solution for Frequent Symmetric Key Exchange in Ad-hoc Networks
: Next to authentication, secure key exchange is considered the most critical and complex issue regarding ad-hoc network security. We present a low-cost, (i.e. low hardware-complex...
Markus Volkmer, Sebastian Wallner
DAC
2009
ACM
14 years 8 months ago
Analysis and mitigation of process variation impacts on Power-Attack Tolerance
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
Lang Lin, Wayne P. Burleson
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
13 years 11 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson
FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
13 years 11 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...