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» Lower Bounds of Computational Power of a Synaptic Calculus
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DAC
1997
ACM
14 years 23 days ago
System-Level Synthesis of Low-Power Hard Real-Time Systems
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
Darko Kirovski, Miodrag Potkonjak
CHARME
2005
Springer
94views Hardware» more  CHARME 2005»
14 years 2 months ago
Verifying Quantitative Properties Using Bound Functions
Abstract. We define and study a quantitative generalization of the traditional boolean framework of model-based specification and verification. In our setting, propositions have...
Arindam Chakrabarti, Krishnendu Chatterjee, Thomas...
ISLPED
1996
ACM
72views Hardware» more  ISLPED 1996»
14 years 21 days ago
Simultaneous buffer and wire sizing for performance and power optimization
In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
Jason Cong, Cheng-Kok Koh, Kwok-Shing Leung
NIPS
2000
13 years 10 months ago
On Reversing Jensen's Inequality
Jensen's inequality is a powerful mathematical tool and one of the workhorses in statistical learning. Its applications therein include the EM algorithm, Bayesian estimation ...
Tony Jebara, Alex Pentland
PODC
2012
ACM
11 years 11 months ago
On the (limited) power of non-equivocation
In recent years, there have been a few proposals to add a small amount of trusted hardware at each replica in a Byzantine fault tolerant system to cut back replication factors. Th...
Allen Clement, Flavio Junqueira, Aniket Kate, Rodr...