46 search results - page 8 / 10 » MAP - Mining Architectures for Product Line Evaluations |
ASPLOS
2010
ACM
14 years 3 months ago
2010
ACM
We present a general scheme for virtualizing main memory errorcorrection mechanisms, which map redundant information needed to correct errors into the memory namespace itself. We ...
ICS
1999
Tsinghua U.
14 years 25 days ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
SOSP
2009
ACM
14 years 5 months ago
2009
ACM
This paper addresses the problem of scheduling concurrent jobs on clusters where application data is stored on the computing nodes. This setting, in which scheduling computations ...
DATE
1998
IEEE
14 years 25 days ago
1998
IEEE
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
SIGCOMM
2010
ACM
13 years 8 months ago
2010
ACM
We present SwitchBlade, a platform for rapidly deploying custom protocols on programmable hardware. SwitchBlade uses a pipeline-based design that allows individual hardware module...