36 search results - page 6 / 8 » MFAST: a single chip highly parallel image processing archit... |
SAC
2006
ACM
14 years 1 months ago
2006
ACM
The reduction of image reconstruction time is needed to spread the use of PET for research and routine clinical practice. In this purpose, this article presents a hardware/softwar...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
SIGGRAPH
2000
ACM
13 years 11 months ago
2000
ACM
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...