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TVLSI
2008
115views more  TVLSI 2008»
13 years 9 months ago
Outer Loop Pipelining for Application Specific Datapaths in FPGAs
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
Kieron Turkington, Turkington A. Constantinides, K...
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
13 years 12 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner
VISUALIZATION
1998
IEEE
14 years 2 months ago
View dependent isosurface extraction
: We present a dynamic view-dependent isosurface extraction method. Our approach is based on the 3-stage approach we first suggested in WISE [15], i.e., front-to-back traversal, so...
Yarden Livnat, Charles D. Hansen
SIGOPSE
1998
ACM
14 years 2 months ago
MMLite: a highly componentized system architecture
MMLite is a modular system architecture that is suitable for a wide variety of hardware and applications. The system provides a selection of object-based components that are dynam...
Johannes Helander, Alessandro Forin
EUROCRYPT
1998
Springer
14 years 2 months ago
How to Improve an Exponentiation Black-Box
Abstract. In this paper we present a method for improving the performance of RSA-type exponentiations. The scheme is based on the observation that replacing the exponent d by d = d...
Gérard D. Cohen, Antoine Lobstein, David Na...