Sciweavers

1921 search results - page 307 / 385
» Making AC-3 an Optimal Algorithm
Sort
View
ICDE
2010
IEEE
224views Database» more  ICDE 2010»
14 years 9 months ago
Probabilistic Declarative Information Extraction
Abstract-Unstructured text represents a large fraction of the world's data. It often contain snippets of structured information within them (e.g., people's names and zip ...
Daisy Zhe Wang, Eirinaios Michelakis, Joseph M. He...
ICCAD
2005
IEEE
107views Hardware» more  ICCAD 2005»
14 years 6 months ago
Projection-based performance modeling for inter/intra-die variations
Large-scale process fluctuations in nano-scale IC technologies suggest applying high-order (e.g., quadratic) response surface models to capture the circuit performance variations....
Xin Li, Jiayong Le, Lawrence T. Pileggi, Andrzej J...
ICCAD
2003
IEEE
115views Hardware» more  ICCAD 2003»
14 years 6 months ago
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
CVPR
2010
IEEE
14 years 6 months ago
Far-Sighted Active Learning on a Budget for Image and Video Recognition
Active learning methods aim to select the most informative unlabeled instances to label first, and can help to focus image or video annotations on the examples that will most impr...
Sudheendra Vijayanarasimhan, Prateek Jain, Kristen...
ISQED
2009
IEEE
94views Hardware» more  ISQED 2009»
14 years 4 months ago
Simultaneous buffer and interlayer via planning for 3D floorplanning
As technology advances, the interconnect delay among modules plays dominant role in chip performance. Buffer insertion, as a traditional approach to reduce wire delay in 2D ICs, i...
Xu He, Sheqin Dong, Yuchun Ma, Xianlong Hong