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COMPUTER
1998
68views more  COMPUTER 1998»
13 years 9 months ago
Making Network Interfaces Less Peripheral
Much of a computer’s value depends on how well it interacts with networks. To enhance this value, designers must improve the performance of networks delivered to users. Fortunat...
Shubhendu S. Mukherjee, Mark D. Hill
HPCA
2005
IEEE
14 years 10 months ago
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihi...
ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
14 years 2 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
IEEEPACT
2006
IEEE
14 years 3 months ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
EUC
2004
Springer
14 years 3 months ago
Invalidation for CORBA Caching in Wireless Devices
Wireless devices are widely used to get some information from the Internet. However, limited bandwidth, frequent disconnections and different communication protocols are most comm...
James Jayaputera, David Taniar