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ASPDAC
2010
ACM
163views Hardware» more  ASPDAC 2010»
13 years 7 months ago
A PUF design for secure FPGA-based embedded systems
The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counterpiracy...
Jason Helge Anderson
ICCAD
2010
IEEE
191views Hardware» more  ICCAD 2010»
13 years 2 months ago
Current Shaping and Multi-thread Activation for Fast and Reliable Power Mode Transition in Multicore Designs
Power gating has been widely adopted in multicore designs. The design of fast and reliable power mode transition for per-core power gating remains a challenging problem. This paper...
Hao Xu Ranga Vemuri Wen-Ben Jone
IPPS
1998
IEEE
14 years 1 months ago
Design of a FEM Computation Engine for Real-Time Laparoscopic Surgery Simulation
We present the design of a computation engine for a real-time laparoscopic surgery simulator. Since this simulator requires realistic real-time and real-world behaviour, a physica...
Alex Rhomberg, Rolf Enzler, Markus Thaler, Gerhard...
FPGA
1998
ACM
140views FPGA» more  FPGA 1998»
14 years 1 months ago
More Wires and Fewer LUTs: A Design Methodology for FPGAs
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
Atsushi Takahara, Toshiaki Miyazaki, Takahiro Muro...
ISSS
1996
IEEE
103views Hardware» more  ISSS 1996»
14 years 1 months ago
Instruction Set Design and Optimizations for Address Computation in DSP Architectures
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
Guido Araujo, Ashok Sudarsanam, Sharad Malik