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POPL
1998
ACM
14 years 2 months ago
Maximal Static Expansion
Memory expansions are classical means to extract parallelism from imperative programs. However, for dynamic control programs with general memory accesses, such transformations eit...
Denis Barthou, Albert Cohen, Jean-Francois Collard
ICCAD
1993
IEEE
81views Hardware» more  ICCAD 1993»
14 years 2 months ago
Inverter minimization in multi-level logic networks
In this paper, we look at the problem of inverter minimization in multi-level logic networks. The network is specified in terms of a set of base functions and the inversion opera...
Alok Jain, Randal E. Bryant
CONCUR
1994
Springer
14 years 2 months ago
Composition and Behaviors of Probabilistic I/O Automata
We augment the I/O automaton model of Lynch and Tuttle with probability, as a step toward the ultimate goal of obtaining a useful tool for specifying and reasoning about asynchron...
Sue-Hwey Wu, Scott A. Smolka, Eugene W. Stark
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
14 years 2 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
APNOMS
2006
Springer
14 years 2 months ago
Scalable DiffServ-over-MPLS Traffic Engineering with Per-flow Traffic Policing
This paper proposes a DiffServ-over-MPLS Traffic Engineering (TE) architecture and describes the implementation of its functional blocks on Intel IXP2400 Network Processor using In...
Djakhongir Siradjev, Ivan Gurin, Young-Tak Kim