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ICCAD
2004
IEEE
123views Hardware» more  ICCAD 2004»
14 years 4 months ago
Logical effort based technology mapping
We propose a new approach to library-based technology mapping, based on the method of logical effort. Our algorithm is close to optimal for fanout-free circuits, and is extended t...
Shrirang K. Karandikar, Sachin S. Sapatnekar
ICRA
2007
IEEE
188views Robotics» more  ICRA 2007»
14 years 2 months ago
The Corridor Map Method: Real-Time High-Quality Path Planning
— A central problem in robotics is planning a collision-free path for a moving object in an environment with obstacles. Contemporary applications require a path planner that is f...
Roland Geraerts, Mark H. Overmars
CANS
2006
Springer
90views Cryptology» more  CANS 2006»
13 years 11 months ago
Shorter Verifier-Local Revocation Group Signatures from Bilinear Maps
We propose a new computational complexity assumption from bilinear map, based on which we construct Verifier-Local Revocation group signatures with shorter lengths than previous on...
Sujing Zhou, Dongdai Lin
ESANN
2004
13 years 9 months ago
Using Andrews Curves for Clustering and Sub-clustering Self-Organizing Maps
Abstract. The use of self-organizing maps to analyze data often depends on finding effective methods to visualize the SOM's structure. In this paper we propose a new way to pe...
Cesar García-Osorio, Jesús Maudes, C...
CODES
2000
IEEE
14 years 4 days ago
Extended design reuse trade-offs in hardware-software architecture mapping
In the design of embedded systems-on-chip, the success of a product generation depends on the exibility to accommodate future design changes. This requirement in uences the hardwa...
Frederik Vermeulen, Francky Catthoor, Diederik Ver...