1056 search results - page 9 / 212 » Mapping an Application to a Control Architecture: Specificat... |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
In modern embedded systems including communication and multimedia applications, large fraction of power is consumed during memory access and data transfer. Thus, buses should be d...
ARC
2010
Springer
13 years 11 months ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
GECCO
2000
Springer
13 years 11 months ago
2000
Springer
Real-time, adaptive control is a difficult problem that can be addressed by EC architectures. We are interested in incorporating into an EC architecture some of the features that ...