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EVOW
2003
Springer
14 years 19 days ago
GAME-HDL: Implementation of Evolutionary Algorithms Using Hardware Description Languages
Evolutionary Algorithms (EAs) have been proposed as a very powerful heuristic optimization technique to solve complex problems. Many case studies have shown that they work very eff...
Rolf Drechsler, Nicole Drechsler
TCSV
2008
120views more  TCSV 2008»
13 years 7 months ago
A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection
Abstract--This paper proposes a parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm and applied to the SLAM (...
Vanderlei Bonato, Eduardo Marques, George A. Const...
CODES
2009
IEEE
13 years 11 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
14 years 4 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
WCE
2007
13 years 8 months ago
High-Performance Multigrid Solvers in Reconfigurable Hardware
—Partial Differential Equations (PDEs) play an essential role in modeling real world problems. The broad field of modeling such systems has drawn the researchers’ attention for...
Safaa J. Kasbah, Issam W. Damaj