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DAC
2008
ACM
14 years 11 months ago
On the role of timing masking in reliable logic circuit design
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes
PVLDB
2011
13 years 5 months ago
Implementing Performance Competitive Logical Recovery
New hardware platforms, e.g. cloud, multi-core, etc., have led to a reconsideration of database system architecture. Our Deuteronomy project separates transactional functionality ...
David B. Lomet, Kostas Tzoumas, Michael J. Zwillin...
ENTCS
2006
100views more  ENTCS 2006»
13 years 10 months ago
Towards a Logic for Performance and Mobility
Klaim is an experimental language designed for modeling and programming distributed systems composed of mobile components where distribution awareness and dynamic system architect...
Rocco De Nicola, Joost-Pieter Katoen, Diego Latell...
HIS
2004
13 years 11 months ago
Neural Networks and Belief Logic
Many researchers have observed that neurons process information in an imprecise manner - if a logical inference emerges from neural computation, it is inexact at best. Thus, there...
Yuan Yan Chen, Joseph J. Chen
ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
14 years 7 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...