391 search results - page 41 / 79 » Massively parallel processing on a chip |
FPL
2005
Springer
14 years 1 months ago
2005
Springer
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
EUROPAR
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. Now that large radiotelescopes like SKA, LOFAR, or ASKAP, become available in different parts of the world, radioastronomers foresee a vast increase in the amount of data...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Clusters of Symmetric MultiProcessing (SMP) nodes with multi-core Chip-Multiprocessors (CMP), also known as SMP-CMP clusters, are becoming ubiquitous today. For Message Passing int...
ICPR
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper we describe a cellular automaton (CA) used to perform the watershed transform in N-D images. Our method is based on image integration via the Ford-Bellman shortest p...
CDES
2010
13 years 5 months ago
2010
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...