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» Measuring Productivity on High Performance Computers
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HPCA
2009
IEEE
16 years 5 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
16 years 4 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
VLSID
2004
IEEE
209views VLSI» more  VLSID 2004»
16 years 4 months ago
An Architecture for Motion Estimation in the Transform Domain
demanding algorithm of a video encoder. It is known that about 60% ~ 80% of the total computation time is consumed for motion estimation [1]. The second is its high impact on the v...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, ...
VLSID
2002
IEEE
99views VLSI» more  VLSID 2002»
16 years 4 months ago
Input Space Adaptive Embedded Software Synthesis
This paper presents a novel technique, called input space adaptive software synthesis, for the energy and performance optimization of embedded software. The proposed technique is ...
Weidong Wang, Anand Raghunathan, Ganesh Lakshminar...
CONEXT
2006
ACM
15 years 10 months ago
Modeling the AIADD paradigm in networks with variable delays
Modeling TCP is fundamental for understanding Internet behavior. The reason is that TCP is responsible for carrying a huge quota of the Internet traffic. During last decade many a...
Gennaro Boggia, Pietro Camarda, Alessandro D'Alcon...