—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
The Horus system supports a communication architecture ats protocols as instances of an abstract data type. This approach encourages developers to partition complex protocols into...
Robbert van Renesse, Kenneth P. Birman, Roy Friedm...
Motion estimation is a temporal image compression technique, where an n x n block of pixels in the current frame of a video sequence is represented by a motion vector with respect...
We present an approach for merging message streams from producers distributed over a network, using a deterministic algorithm that is independent of any nondeterminism of the syst...