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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 6 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
IUI
2010
ACM
14 years 6 months ago
Facilitating exploratory search by model-based navigational cues
We present an extension of a computational cognitive model of social tagging and exploratory search called the semantic imitation model. The model assumes a probabilistic represen...
Wai-Tat Fu, Thomas George Kannampallil, Ruogu Kang
CVPR
2010
IEEE
14 years 6 months ago
Visual Event Recognition in Videos by Learning from Web Data
We propose a visual event recognition framework for consumer domain videos by leveraging a large amount of loosely labeled web videos (e.g., from YouTube). First, we propose a new...
Lixin Duan, Dong Xu, Wai-Hung Tsang, Jiebo Luo
WWW
2010
ACM
14 years 4 months ago
Selecting skyline services for QoS-based web service composition
Web service composition enables seamless and dynamic integration of business applications on the web. The performance of the composed application is determined by the performance ...
Mohammad Alrifai, Dimitrios Skoutas, Thomas Risse
CGO
2010
IEEE
14 years 4 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...