206 search results - page 9 / 42 » Mechanisms for store-wait-free multiprocessors |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
With the advent of multi-processor systems-on-chip, the interest in process migration is again on the rise both in research and in product development. New challenges associated w...
ICES
2003
Springer
14 years 10 days ago
2003
Springer
The communication mechanism used by the biological cells of higher animals is an integral part of an organisms ability to tolerate cell deficiency or loss. The massive redundancy ...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
ICS
2005
Tsinghua U.
14 years 19 days ago
2005
Tsinghua U.
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must explo...
HPCA
2000
IEEE
13 years 11 months ago
2000
IEEE
Abstract—Sharing patterns in shared-memory multiprocessors are the key to performance: uniprocessor latencytolerating techniques such as out-of-order execution and non-blocking c...