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EMSOFT
2007
Springer
14 years 4 months ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 4 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
IESS
2007
Springer
165views Hardware» more  IESS 2007»
14 years 4 months ago
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
Ilya Issenin, Nikil Dutt
LCTRTS
2007
Springer
14 years 4 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
OOPSLA
2007
Springer
14 years 4 months ago
The design and implementation of formal monitoring techniques
In runtime monitoring, a programmer specifies a piece of code to execute when a trace of events occurs during program execution. Previous and related work has shown that runtime m...
Eric Bodden
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