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» MemScale: active low-power modes for main memory
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ASPLOS
2011
ACM
13 years 2 months ago
MemScale: active low-power modes for main memory
Main memory is responsible for a large and increasing fraction of the energy consumed by servers. Prior work has focused on exploiting DRAM low-power states to conserve energy. Ho...
Qingyuan Deng, David Meisner, Luiz E. Ramos, Thoma...
ASPDAC
2001
ACM
117views Hardware» more  ASPDAC 2001»
14 years 2 months ago
Low power techniques for address encoding and memory allocation
- This paper presents encoding techniques to optimize the switching activity on a multiplexed DRAM address bus. The DRAM switching activity can be classified either as external (be...
Wei-Chung Cheng, Massoud Pedram
CC
2007
Springer
126views System Software» more  CC 2007»
14 years 5 months ago
An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
K. Shyam, R. Govindarajan
HPCA
2008
IEEE
14 years 11 months ago
A comprehensive approach to DRAM power management
This paper describes a comprehensive approach for using the memory controller to improve DRAM energy efficiency and manage DRAM power. We make three contributions: (1) we describe...
Ibrahim Hur, Calvin Lin
ISCAS
2005
IEEE
141views Hardware» more  ISCAS 2005»
14 years 4 months ago
Fast-scale instability of single-stage power-factor-correction power supplies
Abstract— This paper describes the fast-scale bifurcation phenomena of a single-stage power-factor-correction (PFC) power supply which is commonly used in low power applications....
Xiaoqun Wu, Chi Kong Tse, Octavian Dranga, Junan L...