117 search results - page 12 / 24 » Memory Access Schemes for Configurable Processors |
CASES
2004
ACM
14 years 1 months ago
2004
ACM
+ With more applications being deployed on embedded platforms, software protection becomes increasingly important. This problem is crucial on embedded systems like financial transa...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
ISCA
1994
IEEE
13 years 11 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
EMSOFT
2005
Springer
14 years 1 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...