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» Memory Aware High-Level Synthesis for Embedded Systems
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RSP
2006
IEEE
102views Control Systems» more  RSP 2006»
14 years 1 months ago
Rapid Resource-Constrained Hardware Performance Estimation
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...
MBEES
2010
13 years 9 months ago
Towards Architectural Programming of Embedded Systems
: Integrating architectural elements with a modern programming language is essential to ensure a smooth combination of architectural design and programming. In this position statem...
Arne Haber, Jan Oliver Ringert, Bernhard Rumpe
CODES
2004
IEEE
13 years 11 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
PFE
2001
Springer
13 years 12 months ago
Introducing Product Lines in Small Embedded Systems
: How do you introduce product lines into a hardware dominated organization that has increasing software architecture awareness and products with extremely limited memory resources...
Christoph Stoermer, Markus Roeddiger
FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
14 years 1 months ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid