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» Memory Aware High-Level Synthesis for Embedded Systems
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CAINE
2008
13 years 9 months ago
An Inexpensive Terrain Awareness and Warning System for Small Aircraft
For pilots the importance of knowing their height (distance above the ground) cannot be minimized. An error in determining height can easily prove fatal. Commercial and military a...
Kim P. Martin, Dwight D. Egbert, Frederick C. Harr...
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 2 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
SAC
2006
ACM
14 years 1 months ago
Hardware/software 2D-3D backprojection on a SoPC platform
The reduction of image reconstruction time is needed to spread the use of PET for research and routine clinical practice. In this purpose, this article presents a hardware/softwar...
Nicolas Gac, Stéphane Mancini, Michel Desvi...
LCTRTS
2005
Springer
14 years 29 days ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
CASES
2006
ACM
14 years 1 months ago
FlashCache: a NAND flash memory file cache for low power web servers
We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a re...
Taeho Kgil, Trevor N. Mudge