Sciweavers

745 search results - page 22 / 149
» Memory Exploration for Low Power, Embedded Systems
Sort
View
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
14 years 2 months ago
Architectural leakage-aware management of partitioned scratchpad memories
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
Olga Golubeva, Mirko Loghi, Massimo Poncino, Enric...
CASES
2007
ACM
13 years 11 months ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
13 years 8 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
MOBIHOC
2000
ACM
14 years 2 days ago
Low power rendezvous in embedded wireless networks
ln the future, wireless networking will be embedded into a wide variety of common, everyday objects [1]. In many embedded networking situations, the communicating nodes will be ver...
Terry Todd, Frazer Bennett, Alan Jones
IPPS
1998
IEEE
13 years 12 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man