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» Memory Exploration for Low Power, Embedded Systems
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CASES
2008
ACM
13 years 9 months ago
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....
RTAS
2010
IEEE
13 years 6 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
EDBT
2008
ACM
188views Database» more  EDBT 2008»
14 years 8 months ago
FAME-DBMS: Tailor-made Data Management Solutions for Embedded Systems
Data management functionality is not only needed in large-scale server systems, but also in embedded systems. Resource restrictions and heterogeneity of hardware, however, complic...
Marko Rosenmüller, Norbert Siegmund, Horst Sc...
DAC
2003
ACM
14 years 1 months ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis
ISSS
2002
IEEE
194views Hardware» more  ISSS 2002»
14 years 23 days ago
Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems
This paper addresses the problem of mapping an application, which is highly dynamic in the future, onto a heterogeneous multiprocessor platform in an energy efficient way. A two-p...
Rudy Lauwereins, Chun Wong, Paul Marchal, Johan Vo...