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» Memory Exploration for Low Power, Embedded Systems
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ASAP
2000
IEEE
142views Hardware» more  ASAP 2000»
14 years 2 months ago
Contention-Conscious Transaction Ordering in Embedded Multiprocessors
This paper explores the problem of efficiently ordering interprocessor communication operations in statically-scheduled multiprocessors for iterative dataflow graphs. In most digi...
Mukul Khandelia, Shuvra S. Bhattacharyya
GLOBECOM
2009
IEEE
13 years 8 months ago
Power Allocation for Cooperative Diversity Networks with Inaccurate CSI: A Robust and Constrained Kalman Filter Approach
In this paper, a novel Kalman filter-based power allocation scheme is developed for cooperative networks with inaccurate channel state information (CSI). The channel estimation err...
Mohamad Khattar Awad, Veluppillai Mahinthan, Xuemi...
CF
2011
ACM
12 years 10 months ago
Hybrid high-performance low-power and ultra-low energy reliable caches
Ubiquitous computing has become a very popular paradigm. The most suitable technological solution for those systems consists of using hybrid processors able to operate at high vol...
Bojan Maric, Jaume Abella, Francisco J. Cazorla, M...
DATE
2010
IEEE
197views Hardware» more  DATE 2010»
13 years 5 months ago
Compilation of stream programs for multicore processors that incorporate scratchpad memories
The stream processing characteristics of many embedded system applications in multimedia and networking domains have led to the advent of stream based programming formats. Several ...
Weijia Che, Amrit Panda, Karam S. Chatha
VLSID
2004
IEEE
85views VLSI» more  VLSID 2004»
14 years 10 months ago
An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System
A key component of the Data-Intensive Architecture (DIVA) is the Processing-In-Memory (PIM) Routing Component (PiRC) that is responsible for efficient communication between PIM ch...
Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Drape...