276 search results - page 44 / 56 » Memory Organization for Improved Data Cache Performance in E... |
LCTRTS
2009
Springer
14 years 3 months ago
2009
Springer
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
FCCM
2006
IEEE
14 years 2 months ago
2006
IEEE
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
MICRO
1997
IEEE
14 years 19 days ago
1997
IEEE
As the disparity between processor and main memory performance grows, the number of execution cycles spent waiting for memory accesses to complete also increases. As a result, lat...
EMSOFT
2007
Springer
14 years 2 months ago
2007
Springer
Non-volatile RAM (NVRAM) such as PRAM (Phase-change RAM), FeRAM (Ferroelectric RAM), and MRAM (Magnetoresistive RAM) has characteristics of both non-volatile storage and random ac...
FPL
2007
Springer
14 years 2 months ago
2007
Springer
In this paper, we present a shared instruction and data memory controller for the On-Chip Memory (OCM) bus of the PowerPC embedded in the Virtex-4 chip. The traditional design of ...