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SOCC
2008
IEEE
169views Education» more  SOCC 2008»
14 years 2 months ago
A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies
— Lowering supply voltage is an effective technique for power reduction in memory design, however traditional memory cell design fails to operate, as shown in [3], [10], at ultra...
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Sar...
CODES
2007
IEEE
14 years 2 months ago
Performance improvement of block based NAND flash translation layer
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
Siddharth Choudhuri, Tony Givargis
IWMM
2007
Springer
130views Hardware» more  IWMM 2007»
14 years 2 months ago
Accordion arrays
In this work, we present accordion arrays, a straightforward and effective memory compression technique targeting Unicode-based character arrays. In many non-numeric Java programs...
Craig B. Zilles
SCOPES
2007
Springer
14 years 2 months ago
Operating system integrated energy aware scratchpad allocation strategies for multiprocess applications
Various scratchpad allocation strategies have been developed in the past. Most of them target the reduction of energy consumption. These approaches share the necessity of having d...
Robert Pyka, Christoph Faßbach, Manish Verma...
ISNN
2005
Springer
14 years 1 months ago
A SIMD Neural Network Processor for Image Processing
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
Dongsun Kim, Hyunsik Kim, Hongsik Kim, Gunhee Han,...