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HICSS
1995
IEEE
128views Biometrics» more  HICSS 1995»
13 years 12 months ago
Instruction Level Parallelism
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
14 years 6 days ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri
ALGORITHMICA
2000
161views more  ALGORITHMICA 2000»
13 years 8 months ago
Binary Searching with Nonuniform Costs and Its Application to Text Retrieval
We study the problem of minimizing the expected cost of binary searching for data where the access cost is not fixed and depends on the last accessed element, such as data stored i...
Gonzalo Navarro, Ricardo A. Baeza-Yates, Eduardo F...
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 5 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
CGO
2008
IEEE
14 years 2 months ago
Automatic array inlining in java virtual machines
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...
Christian Wimmer, Hanspeter Mössenböck