3202 search results - page 552 / 641 » Memory access scheduling |
ICMCS
2006
IEEE
14 years 1 months ago
2006
IEEE
We propose a high performance architecture for fractional motion estimation and Lagrange mode decision in H.264/AVC. Instead of time-consuming fractional-pixel interpolation and s...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
TRIDENTCOM
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— In this work we characterize the energy consumption of a visual sensor network testbed. Each node in the testbed consists of a ”single-board computer”, namely Cross...
WCRE
2006
IEEE
14 years 1 months ago
2006
IEEE
We describe the design and implementation of FFE/x86 (File-Format Extractor for x86), an analysis tool that works on stripped executables (i.e., neither source code nor debugging ...