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VLSID
2009
IEEE
142views VLSI» more  VLSID 2009»
14 years 9 months ago
Floorplanning for Partial Reconfiguration in FPGAs
Partial Reconfiguration on heterogeneous Field Programmable Gate Arrays (FPGA) with millions of gates yields better utilization of resources by swapping in and out the active modu...
Pritha Banerjee, Megha Sangtani, Susmita Sur-Kolay
VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
14 years 9 months ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni
EWSN
2004
Springer
14 years 8 months ago
A Novel Mechanism for Routing in Highly Mobile ad hoc Sensor Networks
This paper describes a novel routing mechanism for a network of highly mobile sensor nodes that routes data over dynamically changing topologies, using only information from neares...
Jane Tateson, Ian W. Marshall
COMPSAC
2008
IEEE
14 years 3 months ago
Constraint Reasoning in Path-Oriented Random Testing
Path-oriented Random Testing (PRT) aims at generating a uniformly spread out sequence of random test data that activate a single control flow path within an imperative program. T...
Arnaud Gotlieb, Matthieu Petit
ICASSP
2008
IEEE
14 years 3 months ago
Optical flow robust estimation in a hybrid multi-resolution MRF framework
We propose in this paper a robust multi-resolution technique to estimate dense velocity field from image sequences. It couples a Gaussian pyramidal down-sampling decomposition to...
Cyril Cassisa, Véronique Prinet, Liang Shao...