Sciweavers

2078 search results - page 24 / 416
» MetaCores: Design and Optimization Techniques
Sort
View
ISSS
1996
IEEE
103views Hardware» more  ISSS 1996»
14 years 19 days ago
Instruction Set Design and Optimizations for Address Computation in DSP Architectures
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
Guido Araujo, Ashok Sudarsanam, Sharad Malik
APCCAS
2006
IEEE
253views Hardware» more  APCCAS 2006»
14 years 2 months ago
Design of Optimal Decimation and Interpolation Filters for Low Bit-Rate Image Coding
— The DCT-based JPEG standard is certainly one of the most successful applications of transform coding methods for still digital images. A commonly recognized disadvantage of the...
Wu-Sheng Lu, A.-M. Sevcenco
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
12 years 4 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
DAC
2010
ACM
13 years 6 months ago
Non-uniform clock mesh optimization with linear programming buffer insertion
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis
ISLPED
2003
ACM
96views Hardware» more  ISLPED 2003»
14 years 1 months ago
Effective graph theoretic techniques for the generalized low power binding problem
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...
Azadeh Davoodi, Ankur Srivastava