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» Methods for true power minimization
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VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
14 years 7 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...
DATE
1999
IEEE
86views Hardware» more  DATE 1999»
13 years 11 months ago
Glitch Power Minimization by Gate Freezing
This paper presents a technique for glitch power minimization in combinational circuits. The total number of glitches is reduced by replacing some existing gates with functionally...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
CORR
2011
Springer
169views Education» more  CORR 2011»
13 years 2 months ago
Power Allocation Based on SEP Minimization in Two-Hop Decode-and-Forward Relay Networks
—The problem of optimal power allocation among the relays in a two-hop decode-and-forward cooperative relay network with independent Rayleigh fading channels is considered. It is...
Arash Khabbazibasmenj, Sergiy A. Vorobyov
CORR
2008
Springer
113views Education» more  CORR 2008»
13 years 7 months ago
Power Indices and minimal winning Coalitions
The Penrose-Banzhaf index and the Shapley-Shubik index are the best-known and the most used tools to measure political power of voters in simple voting games. Most methods to calc...
Werner Kirsch, Jessica Langner
ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
14 years 1 months ago
Finite state machine state assignment for area and power minimization
— In this paper, we address the problem of FSM state assignment to minimize area and power. The objectives are targeted as single/independent as well as multi-objective optimizat...
Aiman H. El-Maleh, Sadiq M. Sait, F. Nawaz Khan