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ISCAS
2007
IEEE
80views Hardware» more  ISCAS 2007»
14 years 5 months ago
Probabilistic Modelling of Phase-tuned Disparity Energy Neuron Populations
- We present a low dimensional Bayes probabilistic model for the population of binocular disparity energy neurons centered at the same retinal location, but selective to different ...
Eric K. C. Tsang, Bertram Emil Shi
ISCAS
2007
IEEE
114views Hardware» more  ISCAS 2007»
14 years 5 months ago
On the Suitability of Discrete-Time Receivers for Software-Defined Radio
—CMOS radio receiver architectures, based on radio frequency (RF) sampling followed by discrete-time (D-T) signal processing via switched-capacitor circuits, have recently been p...
Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
ITC
2003
IEEE
136views Hardware» more  ITC 2003»
14 years 4 months ago
A BIST Solution for The Test of I/O Speed
A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 µ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold...
Cheng Jia, Linda S. Milor
HYBRID
2003
Springer
14 years 4 months ago
A Hoare Logic for Single-Input Single-Output Continuous-Time Control Systems
This paper presents a Hoare-style logic for reasoning about the frequency response of control systems in the continuous-time domain. Two properties, the gain (amplitude) and phase ...
Richard J. Boulton, Ruth Hardy, Ursula Martin
DATE
2002
IEEE
69views Hardware» more  DATE 2002»
14 years 3 months ago
Verifying Clock Schedules in the Presence of Cross Talk
This paper addresses verifying the timing of circuits containing level-sensitive latches in the presence of cross talk. We show that three consecutive periodic occurrences of the ...
Soha Hassoun, Eduardo Calvillo-Gámez, Chris...