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MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
14 years 19 days ago
Pointer cache assisted prefetching
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
Jamison D. Collins, Suleyman Sair, Brad Calder, De...
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 5 months ago
STEM: Spatiotemporal Management of Capacity for Intra-core Last Level Caches
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
Dongyuan Zhan, Hong Jiang, Sharad C. Seth
AGENTS
1997
Springer
13 years 12 months ago
Adaptation and Learning in Animated Creatures
This paper is concerned with synthetic agents interacting with virtual environments, called animated creatures. The animated creatures are articulated graphical gures that are eq...
Jiming Liu, Hong Qin, Yuan Yan Tang, Y. T. Wu
ICCV
2003
IEEE
14 years 9 months ago
Eye Design in the Plenoptic Space of Light Rays
Natural eye designs are optimized with regard to the tasks the eye-carrying organism has to perform for survival. This optimization has been performed by the process of natural ev...
Cornelia Fermüller, Jan Neumann, Yiannis Aloi...