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CODES
2003
IEEE
14 years 1 months ago
Schedule-aware performance estimation of communication architecture for efficient design space exploration
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
Sungchan Kim, Chaeseok Im, Soonhoi Ha
JCP
2008
121views more  JCP 2008»
13 years 8 months ago
Towards Design Space Exploration for Biological Systems
For both embedded systems and biological cell systems, design is a feature that defines their identity. The assembly of different components in designs of both systems can vary wid...
Simon Polstra, Tessa E. Pronk, Andy D. Pimentel, T...
ECBS
2010
IEEE
146views Hardware» more  ECBS 2010»
14 years 1 months ago
Design-Space Exploration through Constraint-Based Model-Transformation
Abstract—Many design steps during system development like functional partitioning, refactoring of the architecture, or the mapping to the platform - can be understood as an explo...
Bernhard Schätz, Florian Hölzl, Torbj&ou...
DAC
2004
ACM
14 years 9 months ago
Retargetable profiling for rapid, early system-level design space exploration
Fast and accurate estimation is critical for exploration of any dece in general. As we move to higher levels of abstraction, on of complete system designs at each level of abstrac...
Lukai Cai, Andreas Gerstlauer, Daniel Gajski
SAMOS
2010
Springer
13 years 7 months ago
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
Igor Böhm, Björn Franke, Nigel P. Topham