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TCAD
1998
86views more  TCAD 1998»
13 years 7 months ago
Fast heuristic and exact algorithms for two-level hazard-free logic minimization
None of the available minimizers for 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to manual and auto...
Michael Theobald, Steven M. Nowick
ICCAD
1993
IEEE
81views Hardware» more  ICCAD 1993»
13 years 12 months ago
Inverter minimization in multi-level logic networks
In this paper, we look at the problem of inverter minimization in multi-level logic networks. The network is specified in terms of a set of base functions and the inversion opera...
Alok Jain, Randal E. Bryant
ICCAD
1997
IEEE
127views Hardware» more  ICCAD 1997»
13 years 12 months ago
OPTIMIST: state minimization for optimal 2-level logic implementation
We present a novel method for state minimization of incompletely-specified finite state machines. Where classic methods simply minimize the number of states, ours directly addre...
Robert M. Fuhrer, Steven M. Nowick
DLT
2009
13 years 5 months ago
Branching-Time Temporal Logics with Minimal Model Quantifiers
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...
Fabio Mogavero, Aniello Murano
STOC
2006
ACM
170views Algorithms» more  STOC 2006»
14 years 8 months ago
Hardness of approximate two-level logic minimization and PAC learning with membership queries
Producing a small DNF expression consistent with given data is a classical problem in computer science that occurs in a number of forms and has numerous applications. We consider ...
Vitaly Feldman