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ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
14 years 4 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
FSTTCS
2003
Springer
14 years 28 days ago
Minimality Results for the Spatial Logics
Daniel Hirschkoff, Étienne Lozes, Davide Sa...
VLSID
1998
IEEE
88views VLSI» more  VLSID 1998»
13 years 12 months ago
A Fast Two-level Logic Minimizer
P. Srinivasa Rao, James Jacob