2314 search results - page 106 / 463 » Minimal Partitions of a Graph |
131
Voted
IPPS
1998
IEEE
15 years 7 months ago
1998
IEEE
In this communication Simulated Annealing and Genetic Algorithms, are applied to the graph partitioning problem. These techniques mimic processes in statistical mechanics and biol...
137
Voted
DATE
2004
IEEE
15 years 7 months ago
2004
IEEE
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
178
Voted
RSP
1998
IEEE
15 years 7 months ago
1998
IEEE
One of the major differences in partitioning for codesign is in the way the communication cost is evaluated. Generally the size of the edge cut-set is used. When communication bet...
142
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EAAI
2007
15 years 3 months ago
2007
This paper presents a swarm intelligence based approach to optimally partition combinational CMOS circuits for pseudoexhaustive testing. The partitioning algorithm ensures reducti...
134
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ISCAS
2002
IEEE
15 years 8 months ago
2002
IEEE
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...